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PŘÍLOHA 10 
/**************************
Chip type               : ATmega16
Program type            : Application
AVR Core Clock frequency: 18,423000 MHz
Memory model            : Small
External RAM size       : 0
Data Stack size         : 256
**************************/
#include <mega16.h>
#include <stdio.h>  
#include <stdlib.h>
#define F_CPU 18423000
#include <delay.h>
#define ADC_VREF_TYPE 0x60
int hrana;
bit por0;
//Deklarace globálních proměnných
unsigned int read_adc(unsigned char kanal)  {
ADMUX=kanal;  
   ADCSRA|=0x40;  
   while ((ADCSRA & 0x10)==0);  
   ADCSRA|= 0x10;  
return ADCW;
} 


void main(void)
{
// Input/Output Ports initialization
// Port A initialization
PORTA=0x00;
DDRA=0x00;
// Port B initialization
PORTB=0x00;
DDRB=0x00;
// Port C initialization
PORTC=0x00;
DDRC=0xC0;
// Port D initialization
PORTD=0x00;
DDRD=0b11111111;

// Timer/Counter 0 initialization // Clock source: System Clock // Clock value: Timer 0 Stopped // Mode: Normal top=0xFF // OC0 output: Disconnected TCCR0=0x00; TCNT0=0x00; OCR0=0x00;

// Timer/Counter 1 initialization // Clock source: System Clock // Clock value: Timer1 Stopped // Mode: Normal top=0xFFFF // OC1A output: Discon. // OC1B output: Discon. // Noise Canceler: Off // Input Capture on Falling Edge // Timer1 Overflow Interrupt: Off // Input Capture Interrupt: Off // Compare A Match Interrupt: Off // Compare B Match Interrupt: Off TCCR1A=0x00; TCCR1B=0x00; TCNT1H=0x00; TCNT1L=0x00; ICR1H=0x00; ICR1L=0x00; OCR1AH=0x00; OCR1AL=0x00; PŘÍLOHA 10 OCR1BH=0x00; OCR1BL=0x00;

// Timer/Counter 2 initialization // Clock source: System Clock // Clock value: Timer2 Stopped // Mode: Normal top=0xFF // OC2 output: Disconnected ASSR=0x00; TCCR2=0x00; TCNT2=0x00; OCR2=0x00;

// External Interrupt(s) initialization // INT0: Off // INT1: Off // INT2: Off MCUCR=0x00; MCUCSR=0x00;

// Timer(s)/Counter(s) Interrupt(s) initialization TIMSK=0x00;

// USART initialization // USART disabled UCSRB=0x00;

// Analog Comparator initialization // Analog Comparator: Off // Analog Comparator Input Capture by Timer/Counter 1: Off ACSR=0x80; SFIOR=0x00;

// ADC initialization // ADC Clock frequency: 575,719 kHz // ADC Voltage Reference: AVCC pin // ADC Auto Trigger Source: Free Running // Only the 8 most significant bits of // the AD conversion result are used ADMUX=ADC_VREF_TYPE & 0xff; ADCSRA=0xA5; SFIOR&=0x1F;

// SPI initialization // SPI disabled SPCR=0x00;

// TWI initialization // TWI disabled TWCR=0x00;

DDRC=0b00000011;
DDRA=0b00000000;
PORTC=0b00000011;

delay_ms(200); PORTC=0b00000001; delay_ms(200); PORTC=0b00000010; delay_ms(2000); hrana=(read_adc(0)+read_adc(1))/2; PORTC=0b00000000;

      while(1){
      if ((read_adc(0)<hrana)*(read_adc(1)<hrana)*(read_adc(2)<hrana)*(read_adc(3)<hrana)){
      PORTD=0b00100111;
      };
      if ((read_adc(0)>hrana)*(read_adc(1)<hrana)*(read_adc(2)<hrana)*(read_adc(3)<hrana)){
      PORTD=0b01101011;
      };
      if ((read_adc(0)<hrana)*(read_adc(1)<hrana)*(read_adc(2)<hrana)*(read_adc(3)>hrana)){
      PORTD=0b01101011;
      }; 

PŘÍLOHA 10

      if ((read_adc(0)<hrana)*(read_adc(1)>hrana)*(read_adc(2)<hrana)*(read_adc(3)<hrana)){
      PORTD=0b01011011;
      }
      if ((read_adc(0)<hrana)*(read_adc(1)<hrana)*(read_adc(2)>hrana)*(read_adc(3)<hrana)){ PORTD=0b00100111;};
       if ((read_adc(0)<hrana)*(read_adc(1)<hrana)*(read_adc(2)>hrana)*(read_adc(3)<hrana)){
      PORTD=0b00100111;
      };
       if ((read_adc(0)>hrana)*(read_adc(1)>hrana)*(read_adc(2)>hrana)*(read_adc(3)> hrana)){
        if (por0){
           PORTD=0b01011011;
           delay_ms(100);
           PORTD=0b01101011;
           delay_ms(2000);
           por0=0;}else{       
          PORTD=0b00100111;
           delay_ms(200);
            por0=1;
            };
          };
       if ((read_adc(0)<hrana)*(read_adc(1)>hrana)*(read_adc(2)>hrana)*(read_adc(3)<hrana)){
      PORTD=0b01100011;
      };
      if ((read_adc(0)>hrana)*(read_adc(1)>hrana)*(read_adc(2)<hrana)*(read_adc(3)<hrana)){
      PORTD=0b01010001;
      };
      if ((read_adc(0)<hrana)*(read_adc(1)<hrana)*(read_adc(2)>hrana)*(read_adc(3)>hrana)){
      PORTD=0b00100110;
      };
      if ((read_adc(0)<hrana)*(read_adc(1)>hrana)*(read_adc(2)>hrana)*(read_adc(3)>hrana)){
      PORTD=0b00100110;
      };
      if ((read_adc(0)>hrana)*(read_adc(1)>hrana)*(read_adc(2)>hrana)*(read_adc(3)<hrana)){
      PORTD=0b00100101;
      };       

} }